Free Demo Module

Computer
Architecture.

Level: Beginner / Intermediate

Understand how a processor works internally: the Von Neumann model, instruction sets, buses, memory hierarchy, and the fetch-

Filter cards
All
Concept
Algorithm
Visuals
Quiz
Chapter 1

The Von Neumann Model

Section 1.1

Fundamental Components

The classic organization of modern computers relies on sequential processing and unified storage of data and instructions.

Concept

Main Units (CPU)

The microprocessor brings together two key components:

  • ALU (Arithmetic and Logic Unit): Performs computations (+, -, AND, OR).
  • Control Unit (CU): Sequences instruction execution and orchestrates data transfers.
Concept

Buses and Main Memory

Components communicate via interconnect buses:

  • Address bus: Carries the targeted memory location.
  • Data bus: Transfers the instruction or data.
  • Control bus: Signals read/write commands (R/W).
Chapter 2

Instruction Cycle Simulator

Section 2.1

Fetch — Decode — Execute

Step through the processing of an assembly program within the processor's registers (PC, IR, ACC).

Interactive Graph

Sequential Execution in the CPU

Click Next Step to watch the instruction pointer (PC) advance and the registers update.

Chapter 3

Memory Hierarchy

Section 3.1

Registers, Caches, and RAM

A fundamental trade-off between access speed, storage capacity, and manufacturing cost.

Algorithm

Average Memory Access Time (AMAT)

Average memory access time depends on the cacheHit Rate:

AMAT = Tcache + (1 - H) × PenaltyRAM

Where H represents the percentage of accesses found directly in cache memory (L1/L2/L3).

Concept

Principle of Locality

  • Temporal Locality: Data that was just accessed is likely to be reused soon (e.g. loops).
  • Spatial Locality: Data contiguous in memory is likely to be accessed shortly after (e.g. arrays).
Interactive Practice

Test your knowledge

Demo Quiz

Question 1: Which register holds the address of the next instruction to execute?

Choose from the processor's internal components.

Correct answer: Program Counter (PC)

The PC register holds the memory address of the next instruction. It is automatically incremented during the fetch

★ Key Points

Demo Summary

Von Neumann: A single memory for code and data, sequential execution.
Instruction cycle: Fetch, Decode, Execute.
Memory: The closer to the CPU (Registers -> L1 -> RAM), the lower the access time.